1. Field of the Invention
This invention relates to the field of devices for coupling computer nodes to a network.
2. Description of the Related Art
Network interface cards (NICs) are devices that allow proper interfacing and coupling of computer nodes to networks, such as local area networks (LANs) and wide area networks (WANs), Current network technology includes fiber distributed data interface (FDDI), two 100 Megabit per second (Mbps) Ethernet variants and Asynchronous Transfer Mode (ATM).
One characteristic of these and next generation network technologies is the high bandwidth available. The aggregate (transmit & receive) physical layer rates for these networks are summarized in Table 1 below:
TABLE 1 ______________________________________ AGGREGATE PHYSICAL NETWORK TYPE LAYER BANDWIDTH ______________________________________ FDDI 100 Mbps Fast Ethernet 100 Mbps 100 VG-AnyLAN 100 Mbps 25 Mbps ATM 50 Mbps OC3c ATM 310 Mbps OC-12c ATM 1.244 Gbps ______________________________________
A NIC typically is a removable component of the input/output (I/O) subsystem of a computer node and provides connectivity between the network and the computer node. An NIC generally has specialized hardware necessary to physically attach to the network and logic components for electronically interfacing the NIC to the computer node.
FIG. 1 shows a typical network 11 coupling a host computer 10 with computer nodes 12-15. Each of the computer nodes is coupled to network 11 through conventional bus 17 and an NIC 20.
FIG. 2 shows the architecture of a typical, conventional NIC 20 designed for interfacing with a high performance network, such as one of those identified in Table 1. NIC 20 has physical interface 21 which includes the hardware needed for making a physical connection to network 11. Typically, physical interface 21 further provides the lowest level data framing and regulates media access in shared media networks.
Protocol engine 22 processes network protocols. The specifics of protocol engine 22 vary significantly depending on the particular network technology. Typically, protocol engine 22 performs one or more of header processing, header formatting and cell segmentation and reassembly. Local memory 23 and microcontroller 24 also might be used to assist with protocol processing.
Local memory 23 and microcontroller 24 also provide arbitration functions, for example, to prevent collisions between signals being transmitted and received by NIC 20. As part of its arbitration function, microcontroller 24 will, when necessary, withhold signal transmission until a line is clear for making such transmission. Microcontroller 24, in conjunction with local memory 23, also reconstructs fragmented signal packets.
Direct memory access (DMA) engine 25 is provided to move data between memory buffers 28 of computer node 12 and receive (Rx) and transmit (Tx) data buffers 26 and 27, respectively. DMA engine 25 typically is managed by microcontroller 24 and local memory 23. Local memory 23 also can be used to temporarily store signals received from network 11 until bus 17 can be acquired for transmitting the signals to computer node 12.
Data transfers from a computer node, such as node 12, through bus 17 are initiated by an NIC device driver 29. Typically, NIC 20 is provided with a pointer to a queue of buffer descriptors which identify memory buffers 28 holding protocol data units (PDUs) that are ready to be transmitted. DMA engine 25 reads memory buffers 28 in the node 12 holding the PDUs, which are subsequently transmitted to network 11. When memory buffers 28 have been completely read, the buffer descriptors are returned to device driver 29 for reuse.
Transfer of data from network 11 to node 12 follows a similar procedure. NIC device driver 29 allocates a pool of buffer space in the memory buffers 28 and provides a pointer identifying the queue of buffer descriptors controlling the buffers to NIC 20. As data is received from the network, it is transferred from NIC 20 to the node memory buffers 28 which have been provided. When a PDU has been completely received and stored in node memory buffers 28, NIC 20 returns the buffer descriptor to the device driver 29.